Facing the challenges of Moore’s Law’s decline and mounting datacenter power needs, AMD is setting its sights on enhancing chip energy efficiency twentyfold by 2030. Central to this strategy are rack-scale architectures. AMD’s Senior VP, Sam Naffziger, emphasizes that larger devices can achieve greater efficiency: “We’re consolidating what was once an entire rack of computing power into a single unit,” he notes. This approach paved the way for AMD’s MI300 series, which maximizes performance through a complex layer of 3D stacked components.

Looking ahead, AMD plans to extend efficiencies beyond the chip to the entire rack, marking a shift towards architectural innovations on a grander scale. This ambition aligns with previous moves by competitors like Nvidia, who introduced rack-scale solutions last year. AMD’s future designs might diverge from Nvidia’s by harnessing photonic interconnects instead of traditional copper, aiming for improved bandwidth.

Despite these strides in hardware, AMD recognizes the critical role of software. The company is investing heavily in optimizing its software stack to keep pace with rapid advancements in AI models and workloads. This ongoing evolution in both hardware and software is geared towards achieving AMD’s ambitious 2030 goals, highlighting the interplay between technology and software in the industry’s progress.